Circuit Assembly Line: perfect overclocks (×4 power, ×4 speed — EU per circuit never changes) driven purely by hatch voltage. Exactly one regular energy hatch — no multi-amp, no laser, no TecTech hatches; the single-hatch rule counts it as 1A, so only the hatch's tier matters. Once overclocks pass the 1-tick floor, the surplus converts into free sub-tick parallels.
Circuits per minute per hatch tier. Every tier = one perfect overclock (×4 speed); past the 1-tick floor the growth continues through sub-tick parallels — the curve never flattens as long as voltage keeps quadrupling. Marker = current tier.
Sub-tick parallels per batch (bars, left) and recipe time in ticks (line labels). Parallels appear once the OC count exceeds what's needed to reach 1 tick.
How the CAL computes this: the structure accepts only regular energy hatches (atLeast(Energy)) and the machine check requires exactly one — no multi-amp, exotic, or laser hatches. The single-hatch rule (useSingleAmp) sets amperage to 1, so machine power = hatch voltage, full stop. Overclocks are perfect (enablePerfectOverclock()): count = ⌊log₄(hatchV ÷ recipe EU/t)⌋, uncapped by tier difference, each ×4 speed at ×4 draw — EU per circuit is invariant. When the OC count exceeds ⌈log₄(duration)⌉ (the OCs needed to hit 1 tick), calculateMultiplierUnderOneTick converts the surplus into parallels: ×4 per extra OC plus a fractional correction, capped by hatchV ÷ recipe EU/t. Modes: Circuit Assembly Line mode runs imprinted circuit-line recipes (one imprint per CAL, forever) and needs recipe EU/t ≤ hatch V; Circuit Assembler mode runs normal circuit assembler recipes, needs machine length ≥ 5 and recipe EU/t ≤ hatch V ÷ 4 (recipe tier at most hatch tier − 1). Batch mode, input separation, and single-recipe locking are supported; batch multiplies inputs/outputs/time together — no rate change.